mirror of
https://github.com/Ryujinx/Ryujinx.git
synced 2024-10-01 12:30:00 +02:00
550 lines
18 KiB
C#
550 lines
18 KiB
C#
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using Ryujinx.Common;
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using System;
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using System.Runtime.CompilerServices;
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using System.Runtime.InteropServices;
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namespace Ryujinx.Memory
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{
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/// <summary>
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/// Represents a address space manager.
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/// Supports virtual memory region mapping, address translation and read/write access to mapped regions.
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/// </summary>
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public sealed class AddressSpaceManager : IVirtualMemoryManager
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{
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public const int PageBits = 12;
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public const int PageSize = 1 << PageBits;
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public const int PageMask = PageSize - 1;
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private const int PtLevelBits = 9; // 9 * 4 + 12 = 48 (max address space size)
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private const int PtLevelSize = 1 << PtLevelBits;
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private const int PtLevelMask = PtLevelSize - 1;
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private const ulong Unmapped = ulong.MaxValue;
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/// <summary>
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/// Address space width in bits.
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/// </summary>
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public int AddressSpaceBits { get; }
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private readonly ulong _addressSpaceSize;
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private readonly MemoryBlock _backingMemory;
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private readonly ulong[][][][] _pageTable;
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/// <summary>
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/// Creates a new instance of the memory manager.
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/// </summary>
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/// <param name="backingMemory">Physical backing memory where virtual memory will be mapped to</param>
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/// <param name="addressSpaceSize">Size of the address space</param>
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public AddressSpaceManager(MemoryBlock backingMemory, ulong addressSpaceSize)
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{
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ulong asSize = PageSize;
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int asBits = PageBits;
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while (asSize < addressSpaceSize)
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{
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asSize <<= 1;
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asBits++;
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}
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AddressSpaceBits = asBits;
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_addressSpaceSize = asSize;
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_backingMemory = backingMemory;
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_pageTable = new ulong[PtLevelSize][][][];
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}
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/// <summary>
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/// Maps a virtual memory range into a physical memory range.
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/// </summary>
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/// <remarks>
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/// Addresses and size must be page aligned.
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/// </remarks>
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/// <param name="va">Virtual memory address</param>
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/// <param name="pa">Physical memory address</param>
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/// <param name="size">Size to be mapped</param>
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public void Map(ulong va, ulong pa, ulong size)
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{
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while (size != 0)
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{
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PtMap(va, pa);
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va += PageSize;
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pa += PageSize;
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size -= PageSize;
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}
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}
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/// <summary>
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/// Unmaps a previously mapped range of virtual memory.
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/// </summary>
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/// <param name="va">Virtual address of the range to be unmapped</param>
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/// <param name="size">Size of the range to be unmapped</param>
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public void Unmap(ulong va, ulong size)
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{
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while (size != 0)
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{
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PtUnmap(va);
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va += PageSize;
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size -= PageSize;
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}
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}
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/// <summary>
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/// Reads data from mapped memory.
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/// </summary>
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/// <typeparam name="T">Type of the data being read</typeparam>
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/// <param name="va">Virtual address of the data in memory</param>
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/// <returns>The data</returns>
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/// <exception cref="InvalidMemoryRegionException">Throw for unhandled invalid or unmapped memory accesses</exception>
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public T Read<T>(ulong va) where T : unmanaged
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{
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return MemoryMarshal.Cast<byte, T>(GetSpan(va, Unsafe.SizeOf<T>()))[0];
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}
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/// <summary>
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/// Reads data from mapped memory.
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/// </summary>
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/// <param name="va">Virtual address of the data in memory</param>
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/// <param name="data">Span to store the data being read into</param>
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/// <exception cref="InvalidMemoryRegionException">Throw for unhandled invalid or unmapped memory accesses</exception>
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public void Read(ulong va, Span<byte> data)
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{
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ReadImpl(va, data);
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}
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/// <summary>
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/// Writes data to mapped memory.
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/// </summary>
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/// <typeparam name="T">Type of the data being written</typeparam>
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/// <param name="va">Virtual address to write the data into</param>
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/// <param name="value">Data to be written</param>
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/// <exception cref="InvalidMemoryRegionException">Throw for unhandled invalid or unmapped memory accesses</exception>
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public void Write<T>(ulong va, T value) where T : unmanaged
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{
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Write(va, MemoryMarshal.Cast<T, byte>(MemoryMarshal.CreateSpan(ref value, 1)));
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}
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/// <summary>
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/// Writes data to mapped memory.
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/// </summary>
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/// <param name="va">Virtual address to write the data into</param>
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/// <param name="data">Data to be written</param>
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/// <exception cref="InvalidMemoryRegionException">Throw for unhandled invalid or unmapped memory accesses</exception>
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public void Write(ulong va, ReadOnlySpan<byte> data)
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{
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if (data.Length == 0)
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{
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return;
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}
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if (IsContiguousAndMapped(va, data.Length))
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{
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data.CopyTo(_backingMemory.GetSpan(GetPhysicalAddressInternal(va), data.Length));
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}
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else
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{
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int offset = 0, size;
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if ((va & PageMask) != 0)
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{
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ulong pa = GetPhysicalAddressInternal(va);
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size = Math.Min(data.Length, PageSize - (int)(va & PageMask));
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data.Slice(0, size).CopyTo(_backingMemory.GetSpan(pa, size));
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offset += size;
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}
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for (; offset < data.Length; offset += size)
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{
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ulong pa = GetPhysicalAddressInternal(va + (ulong)offset);
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size = Math.Min(data.Length - offset, PageSize);
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data.Slice(offset, size).CopyTo(_backingMemory.GetSpan(pa, size));
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}
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}
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}
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/// <summary>
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/// Gets a read-only span of data from mapped memory.
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/// </summary>
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/// <remarks>
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/// This may perform a allocation if the data is not contiguous in memory.
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/// For this reason, the span is read-only, you can't modify the data.
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/// </remarks>
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/// <param name="va">Virtual address of the data</param>
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/// <param name="size">Size of the data</param>
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/// <param name="tracked">True if read tracking is triggered on the span</param>
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/// <returns>A read-only span of the data</returns>
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/// <exception cref="InvalidMemoryRegionException">Throw for unhandled invalid or unmapped memory accesses</exception>
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public ReadOnlySpan<byte> GetSpan(ulong va, int size, bool tracked = false)
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{
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if (size == 0)
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{
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return ReadOnlySpan<byte>.Empty;
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}
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if (IsContiguousAndMapped(va, size))
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{
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return _backingMemory.GetSpan(GetPhysicalAddressInternal(va), size);
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}
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else
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{
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Span<byte> data = new byte[size];
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ReadImpl(va, data);
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return data;
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}
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}
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/// <summary>
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/// Gets a region of memory that can be written to.
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/// </summary>
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/// <remarks>
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/// If the requested region is not contiguous in physical memory,
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/// this will perform an allocation, and flush the data (writing it
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/// back to the backing memory) on disposal.
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/// </remarks>
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/// <param name="va">Virtual address of the data</param>
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/// <param name="size">Size of the data</param>
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/// <returns>A writable region of memory containing the data</returns>
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/// <exception cref="InvalidMemoryRegionException">Throw for unhandled invalid or unmapped memory accesses</exception>
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public WritableRegion GetWritableRegion(ulong va, int size)
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{
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if (size == 0)
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{
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return new WritableRegion(null, va, Memory<byte>.Empty);
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}
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if (IsContiguousAndMapped(va, size))
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{
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return new WritableRegion(null, va, _backingMemory.GetMemory(GetPhysicalAddressInternal(va), size));
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}
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else
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{
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Memory<byte> memory = new byte[size];
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GetSpan(va, size).CopyTo(memory.Span);
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return new WritableRegion(this, va, memory);
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}
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}
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/// <summary>
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/// Gets a reference for the given type at the specified virtual memory address.
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/// </summary>
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/// <remarks>
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/// The data must be located at a contiguous memory region.
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/// </remarks>
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/// <typeparam name="T">Type of the data to get the reference</typeparam>
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/// <param name="va">Virtual address of the data</param>
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/// <returns>A reference to the data in memory</returns>
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/// <exception cref="MemoryNotContiguousException">Throw if the specified memory region is not contiguous in physical memory</exception>
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public ref T GetRef<T>(ulong va) where T : unmanaged
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{
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if (!IsContiguous(va, Unsafe.SizeOf<T>()))
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{
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ThrowMemoryNotContiguous();
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}
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return ref _backingMemory.GetRef<T>(GetPhysicalAddressInternal(va));
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}
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private void ThrowMemoryNotContiguous() => throw new MemoryNotContiguousException();
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[MethodImpl(MethodImplOptions.AggressiveInlining)]
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private bool IsContiguousAndMapped(ulong va, int size) => IsContiguous(va, size) && IsMapped(va);
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[MethodImpl(MethodImplOptions.AggressiveInlining)]
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private bool IsContiguous(ulong va, int size)
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{
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if (!ValidateAddress(va))
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{
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return false;
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}
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ulong endVa = (va + (ulong)size + PageMask) & ~(ulong)PageMask;
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va &= ~(ulong)PageMask;
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int pages = (int)((endVa - va) / PageSize);
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for (int page = 0; page < pages - 1; page++)
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{
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if (!ValidateAddress(va + PageSize))
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{
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return false;
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}
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if (GetPhysicalAddressInternal(va) + PageSize != GetPhysicalAddressInternal(va + PageSize))
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{
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return false;
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}
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va += PageSize;
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}
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return true;
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}
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/// <summary>
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/// Gets the physical regions that make up the given virtual address region.
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/// If any part of the virtual region is unmapped, null is returned.
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/// </summary>
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/// <param name="va">Virtual address of the range</param>
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/// <param name="size">Size of the range</param>
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/// <returns>Array of physical regions</returns>
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public (ulong address, ulong size)[] GetPhysicalRegions(ulong va, ulong size)
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{
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throw new NotImplementedException();
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}
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private void ReadImpl(ulong va, Span<byte> data)
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{
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if (data.Length == 0)
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{
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return;
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}
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int offset = 0, size;
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if ((va & PageMask) != 0)
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{
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ulong pa = GetPhysicalAddressInternal(va);
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size = Math.Min(data.Length, PageSize - (int)(va & PageMask));
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_backingMemory.GetSpan(pa, size).CopyTo(data.Slice(0, size));
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offset += size;
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}
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for (; offset < data.Length; offset += size)
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{
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ulong pa = GetPhysicalAddressInternal(va + (ulong)offset);
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size = Math.Min(data.Length - offset, PageSize);
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_backingMemory.GetSpan(pa, size).CopyTo(data.Slice(offset, size));
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}
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}
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/// <summary>
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/// Checks if the page at a given virtual address is mapped.
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/// </summary>
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/// <param name="va">Virtual address to check</param>
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/// <returns>True if the address is mapped, false otherwise</returns>
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[MethodImpl(MethodImplOptions.AggressiveInlining)]
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public bool IsMapped(ulong va)
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{
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if (!ValidateAddress(va))
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{
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return false;
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}
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return PtRead(va) != Unmapped;
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}
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/// <summary>
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/// Checks if a memory range is mapped.
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/// </summary>
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/// <param name="va">Virtual address of the range</param>
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/// <param name="size">Size of the range in bytes</param>
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/// <returns>True if the entire range is mapped, false otherwise</returns>
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public bool IsRangeMapped(ulong va, ulong size)
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{
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if (size == 0UL)
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{
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return true;
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}
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ulong endVa = (va + size + PageMask) & ~(ulong)PageMask;
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va &= ~(ulong)PageMask;
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while (va < endVa)
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{
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if (!IsMapped(va))
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{
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return false;
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}
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va += PageSize;
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}
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return true;
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}
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private bool ValidateAddress(ulong va)
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{
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return va < _addressSpaceSize;
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}
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/// <summary>
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/// Performs address translation of the address inside a mapped memory range.
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/// </summary>
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/// <remarks>
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/// If the address is invalid or unmapped, -1 will be returned.
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/// </remarks>
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/// <param name="va">Virtual address to be translated</param>
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/// <returns>The physical address</returns>
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public ulong GetPhysicalAddress(ulong va)
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{
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// We return -1L if the virtual address is invalid or unmapped.
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if (!ValidateAddress(va) || !IsMapped(va))
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{
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return ulong.MaxValue;
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}
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return GetPhysicalAddressInternal(va);
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}
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private ulong GetPhysicalAddressInternal(ulong va)
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{
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return PtRead(va) + (va & PageMask);
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}
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/// <summary>
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/// Reprotect a region of virtual memory for tracking. Sets software protection bits.
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/// </summary>
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/// <param name="va">Virtual address base</param>
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/// <param name="size">Size of the region to protect</param>
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/// <param name="protection">Memory protection to set</param>
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public void TrackingReprotect(ulong va, ulong size, MemoryPermission protection)
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{
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throw new NotImplementedException();
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}
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private ulong PtRead(ulong va)
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{
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int l3 = (int)(va >> PageBits) & PtLevelMask;
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int l2 = (int)(va >> (PageBits + PtLevelBits)) & PtLevelMask;
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int l1 = (int)(va >> (PageBits + PtLevelBits * 2)) & PtLevelMask;
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int l0 = (int)(va >> (PageBits + PtLevelBits * 3)) & PtLevelMask;
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|
|||
|
if (_pageTable[l0] == null)
|
|||
|
{
|
|||
|
return Unmapped;
|
|||
|
}
|
|||
|
|
|||
|
if (_pageTable[l0][l1] == null)
|
|||
|
{
|
|||
|
return Unmapped;
|
|||
|
}
|
|||
|
|
|||
|
if (_pageTable[l0][l1][l2] == null)
|
|||
|
{
|
|||
|
return Unmapped;
|
|||
|
}
|
|||
|
|
|||
|
return _pageTable[l0][l1][l2][l3];
|
|||
|
}
|
|||
|
|
|||
|
private void PtMap(ulong va, ulong value)
|
|||
|
{
|
|||
|
int l3 = (int)(va >> PageBits) & PtLevelMask;
|
|||
|
int l2 = (int)(va >> (PageBits + PtLevelBits)) & PtLevelMask;
|
|||
|
int l1 = (int)(va >> (PageBits + PtLevelBits * 2)) & PtLevelMask;
|
|||
|
int l0 = (int)(va >> (PageBits + PtLevelBits * 3)) & PtLevelMask;
|
|||
|
|
|||
|
if (_pageTable[l0] == null)
|
|||
|
{
|
|||
|
_pageTable[l0] = new ulong[PtLevelSize][][];
|
|||
|
}
|
|||
|
|
|||
|
if (_pageTable[l0][l1] == null)
|
|||
|
{
|
|||
|
_pageTable[l0][l1] = new ulong[PtLevelSize][];
|
|||
|
}
|
|||
|
|
|||
|
if (_pageTable[l0][l1][l2] == null)
|
|||
|
{
|
|||
|
_pageTable[l0][l1][l2] = new ulong[PtLevelSize];
|
|||
|
|
|||
|
for (int i = 0; i < _pageTable[l0][l1][l2].Length; i++)
|
|||
|
{
|
|||
|
_pageTable[l0][l1][l2][i] = Unmapped;
|
|||
|
}
|
|||
|
}
|
|||
|
|
|||
|
_pageTable[l0][l1][l2][l3] = value;
|
|||
|
}
|
|||
|
|
|||
|
private void PtUnmap(ulong va)
|
|||
|
{
|
|||
|
int l3 = (int)(va >> PageBits) & PtLevelMask;
|
|||
|
int l2 = (int)(va >> (PageBits + PtLevelBits)) & PtLevelMask;
|
|||
|
int l1 = (int)(va >> (PageBits + PtLevelBits * 2)) & PtLevelMask;
|
|||
|
int l0 = (int)(va >> (PageBits + PtLevelBits * 3)) & PtLevelMask;
|
|||
|
|
|||
|
if (_pageTable[l0] == null)
|
|||
|
{
|
|||
|
return;
|
|||
|
}
|
|||
|
|
|||
|
if (_pageTable[l0][l1] == null)
|
|||
|
{
|
|||
|
return;
|
|||
|
}
|
|||
|
|
|||
|
if (_pageTable[l0][l1][l2] == null)
|
|||
|
{
|
|||
|
return;
|
|||
|
}
|
|||
|
|
|||
|
_pageTable[l0][l1][l2][l3] = Unmapped;
|
|||
|
|
|||
|
bool empty = true;
|
|||
|
|
|||
|
for (int i = 0; i < _pageTable[l0][l1][l2].Length; i++)
|
|||
|
{
|
|||
|
empty &= (_pageTable[l0][l1][l2][i] == Unmapped);
|
|||
|
}
|
|||
|
|
|||
|
if (empty)
|
|||
|
{
|
|||
|
_pageTable[l0][l1][l2] = null;
|
|||
|
|
|||
|
RemoveIfAllNull(l0, l1);
|
|||
|
}
|
|||
|
}
|
|||
|
|
|||
|
private void RemoveIfAllNull(int l0, int l1)
|
|||
|
{
|
|||
|
bool empty = true;
|
|||
|
|
|||
|
for (int i = 0; i < _pageTable[l0][l1].Length; i++)
|
|||
|
{
|
|||
|
empty &= (_pageTable[l0][l1][i] == null);
|
|||
|
}
|
|||
|
|
|||
|
if (empty)
|
|||
|
{
|
|||
|
_pageTable[l0][l1] = null;
|
|||
|
|
|||
|
RemoveIfAllNull(l0);
|
|||
|
}
|
|||
|
}
|
|||
|
|
|||
|
private void RemoveIfAllNull(int l0)
|
|||
|
{
|
|||
|
bool empty = true;
|
|||
|
|
|||
|
for (int i = 0; i < _pageTable[l0].Length; i++)
|
|||
|
{
|
|||
|
empty &= (_pageTable[l0][i] == null);
|
|||
|
}
|
|||
|
|
|||
|
if (empty)
|
|||
|
{
|
|||
|
_pageTable[l0] = null;
|
|||
|
}
|
|||
|
}
|
|||
|
}
|
|||
|
}
|