mirror of
https://github.com/Ryujinx/Ryujinx.git
synced 2024-10-01 12:30:00 +02:00
Implement MSR instruction for A32 (#2585)
* Implement MSR instruction Fix #1342. Now Pocket Rumble is playable. * Address gdkchan's comments * Address gdkchan's comments * Address gdkchan's comment
This commit is contained in:
parent
8e1adb95cf
commit
501c3d5cea
3 changed files with 69 additions and 0 deletions
29
ARMeilleure/Decoders/OpCode32MsrReg.cs
Normal file
29
ARMeilleure/Decoders/OpCode32MsrReg.cs
Normal file
|
@ -0,0 +1,29 @@
|
||||||
|
using ARMeilleure.State;
|
||||||
|
|
||||||
|
namespace ARMeilleure.Decoders
|
||||||
|
{
|
||||||
|
class OpCode32MsrReg : OpCode32
|
||||||
|
{
|
||||||
|
public bool R { get; }
|
||||||
|
public int Mask { get; }
|
||||||
|
public int Rd { get; }
|
||||||
|
public bool Banked { get; }
|
||||||
|
public int Rn { get; }
|
||||||
|
|
||||||
|
public new static OpCode Create(InstDescriptor inst, ulong address, int opCode) => new OpCode32MsrReg(inst, address, opCode);
|
||||||
|
|
||||||
|
public OpCode32MsrReg(InstDescriptor inst, ulong address, int opCode) : base(inst, address, opCode)
|
||||||
|
{
|
||||||
|
R = ((opCode >> 22) & 1) != 0;
|
||||||
|
Mask = (opCode >> 16) & 0xf;
|
||||||
|
Rd = (opCode >> 12) & 0xf;
|
||||||
|
Banked = ((opCode >> 9) & 1) != 0;
|
||||||
|
Rn = (opCode >> 0) & 0xf;
|
||||||
|
|
||||||
|
if (Rn == RegisterAlias.Aarch32Pc || Mask == 0)
|
||||||
|
{
|
||||||
|
Instruction = InstDescriptor.Undefined;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
|
@ -702,6 +702,7 @@ namespace ARMeilleure.Decoders
|
||||||
SetA32("<<<<00110100xxxxxxxxxxxxxxxxxxxx", InstName.Movt, InstEmit32.Movt, OpCode32AluImm16.Create);
|
SetA32("<<<<00110100xxxxxxxxxxxxxxxxxxxx", InstName.Movt, InstEmit32.Movt, OpCode32AluImm16.Create);
|
||||||
SetA32("<<<<1110xxx1xxxxxxxx111xxxx1xxxx", InstName.Mrc, InstEmit32.Mrc, OpCode32System.Create);
|
SetA32("<<<<1110xxx1xxxxxxxx111xxxx1xxxx", InstName.Mrc, InstEmit32.Mrc, OpCode32System.Create);
|
||||||
SetA32("<<<<11000101xxxxxxxx111xxxxxxxxx", InstName.Mrrc, InstEmit32.Mrrc, OpCode32System.Create);
|
SetA32("<<<<11000101xxxxxxxx111xxxxxxxxx", InstName.Mrrc, InstEmit32.Mrrc, OpCode32System.Create);
|
||||||
|
SetA32("<<<<00010x10xxxx111100000000xxxx", InstName.Msr, InstEmit32.Msr, OpCode32MsrReg.Create);
|
||||||
SetA32("<<<<0000000xxxxx0000xxxx1001xxxx", InstName.Mul, InstEmit32.Mul, OpCode32AluMla.Create);
|
SetA32("<<<<0000000xxxxx0000xxxx1001xxxx", InstName.Mul, InstEmit32.Mul, OpCode32AluMla.Create);
|
||||||
SetA32("<<<<0011111x0000xxxxxxxxxxxxxxxx", InstName.Mvn, InstEmit32.Mvn, OpCode32AluImm.Create);
|
SetA32("<<<<0011111x0000xxxxxxxxxxxxxxxx", InstName.Mvn, InstEmit32.Mvn, OpCode32AluImm.Create);
|
||||||
SetA32("<<<<0001111x0000xxxxxxxxxxx0xxxx", InstName.Mvn, InstEmit32.Mvn, OpCode32AluRsImm.Create);
|
SetA32("<<<<0001111x0000xxxxxxxxxxx0xxxx", InstName.Mvn, InstEmit32.Mvn, OpCode32AluRsImm.Create);
|
||||||
|
|
|
@ -169,6 +169,45 @@ namespace ARMeilleure.Instructions
|
||||||
SetIntA32(context, op.CRn, context.ConvertI64ToI32(context.ShiftRightUI(result, Const(32))));
|
SetIntA32(context, op.CRn, context.ConvertI64ToI32(context.ShiftRightUI(result, Const(32))));
|
||||||
}
|
}
|
||||||
|
|
||||||
|
public static void Msr(ArmEmitterContext context)
|
||||||
|
{
|
||||||
|
OpCode32MsrReg op = (OpCode32MsrReg)context.CurrOp;
|
||||||
|
|
||||||
|
if (op.R)
|
||||||
|
{
|
||||||
|
throw new NotImplementedException("SPSR");
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
if ((op.Mask & 8) != 0)
|
||||||
|
{
|
||||||
|
Operand value = GetIntA32(context, op.Rn);
|
||||||
|
|
||||||
|
EmitSetNzcv(context, value);
|
||||||
|
|
||||||
|
Operand q = context.ShiftRightUI(value, Const((int)PState.QFlag));
|
||||||
|
q = context.BitwiseAnd(q, Const(1));
|
||||||
|
|
||||||
|
SetFlag(context, PState.QFlag, q);
|
||||||
|
}
|
||||||
|
|
||||||
|
if ((op.Mask & 4) != 0)
|
||||||
|
{
|
||||||
|
throw new NotImplementedException("APSR_g");
|
||||||
|
}
|
||||||
|
|
||||||
|
if ((op.Mask & 2) != 0)
|
||||||
|
{
|
||||||
|
throw new NotImplementedException("CPSR_x");
|
||||||
|
}
|
||||||
|
|
||||||
|
if ((op.Mask & 1) != 0)
|
||||||
|
{
|
||||||
|
throw new NotImplementedException("CPSR_c");
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
public static void Nop(ArmEmitterContext context) { }
|
public static void Nop(ArmEmitterContext context) { }
|
||||||
|
|
||||||
public static void Vmrs(ArmEmitterContext context)
|
public static void Vmrs(ArmEmitterContext context)
|
||||||
|
|
Loading…
Reference in a new issue