1
0
Fork 0
mirror of https://github.com/Ryujinx/Ryujinx.git synced 2024-10-01 12:30:00 +02:00
Ryujinx/ARMeilleure/State
gdkchan 80d4199fb3
Refactor NativeContext (#1410)
* Refactor NativeContext

* Fix bugs

* Use correct counts

* Check index using register count constants
2020-07-24 16:13:14 -03:00
..
Aarch32Mode.cs Add a new JIT compiler for CPU code (#693) 2019-08-08 21:56:22 +03:00
ExecutionContext.cs Implement CNTVCT_EL0 (#1268) 2020-05-23 12:15:59 +02:00
ExecutionMode.cs Add a new JIT compiler for CPU code (#693) 2019-08-08 21:56:22 +03:00
FPCR.cs Add most of the A32 instruction set to ARMeilleure (#897) 2020-02-24 08:20:40 +11:00
FPException.cs Add a new JIT compiler for CPU code (#693) 2019-08-08 21:56:22 +03:00
FPRoundingMode.cs Add a new JIT compiler for CPU code (#693) 2019-08-08 21:56:22 +03:00
FPSR.cs Add most of the A32 instruction set to ARMeilleure (#897) 2020-02-24 08:20:40 +11:00
FPState.cs Add most of the A32 instruction set to ARMeilleure (#897) 2020-02-24 08:20:40 +11:00
FPType.cs Add a new JIT compiler for CPU code (#693) 2019-08-08 21:56:22 +03:00
InstExceptionEventArgs.cs Add a new JIT compiler for CPU code (#693) 2019-08-08 21:56:22 +03:00
InstUndefinedEventArgs.cs Add a new JIT compiler for CPU code (#693) 2019-08-08 21:56:22 +03:00
NativeContext.cs Refactor NativeContext (#1410) 2020-07-24 16:13:14 -03:00
PState.cs Add SSAT, SSAT16, USAT and USAT16 ARM32 instructions (#954) 2020-03-01 07:51:55 +11:00
RegisterAlias.cs Add most of the A32 instruction set to ARMeilleure (#897) 2020-02-24 08:20:40 +11:00
RegisterConsts.cs Add most of the A32 instruction set to ARMeilleure (#897) 2020-02-24 08:20:40 +11:00
V128.cs Improve V128 (#1097) 2020-04-17 08:19:20 +10:00