mirror of
https://github.com/Ryujinx/Ryujinx.git
synced 2024-10-01 12:30:00 +02:00
366 lines
No EOL
12 KiB
C#
366 lines
No EOL
12 KiB
C#
using System;
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using System.Collections.Generic;
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namespace Ryujinx.Graphics.Gal.Shader
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{
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static class ShaderOptExprProp
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{
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private struct UseSite
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{
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public ShaderIrNode Parent { get; private set; }
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public ShaderIrCond Cond { get; private set; }
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public int UseIndex { get; private set; }
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public int OperIndex { get; private set; }
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public UseSite(
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ShaderIrNode Parent,
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ShaderIrCond Cond,
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int UseIndex,
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int OperIndex)
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{
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this.Parent = Parent;
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this.Cond = Cond;
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this.UseIndex = UseIndex;
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this.OperIndex = OperIndex;
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}
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}
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private class RegUse
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{
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public ShaderIrAsg Asg { get; private set; }
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public int AsgIndex { get; private set; }
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public int LastSiteIndex { get; private set; }
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public ShaderIrCond Cond { get; private set; }
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private List<UseSite> Sites;
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public RegUse()
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{
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Sites = new List<UseSite>();
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}
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public void AddUseSite(UseSite Site)
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{
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if (LastSiteIndex < Site.UseIndex)
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{
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LastSiteIndex = Site.UseIndex;
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}
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Sites.Add(Site);
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}
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public bool TryPropagate()
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{
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//This happens when a untiliazied register is used,
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//this usually indicates a decoding error, but may also
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//be caused by bogus programs (?). In any case, we just
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//keep the unitialized access and avoid trying to propagate
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//the expression (since we can't propagate what doesn't yet exist).
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if (Asg == null)
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{
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return false;
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}
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if (Cond != null)
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{
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//If the assignment is conditional, we can only propagate
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//to the use sites that shares the same condition of the assignment.
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foreach (UseSite Site in Sites)
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{
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if (!IsSameCondition(Cond, Site.Cond))
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{
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return false;
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}
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}
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}
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if (Sites.Count > 0)
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{
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foreach (UseSite Site in Sites)
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{
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if (Site.Parent is ShaderIrCond Cond)
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{
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switch (Site.OperIndex)
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{
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case 0: Cond.Pred = Asg.Src; break;
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case 1: Cond.Child = Asg.Src; break;
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default: throw new InvalidOperationException();
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}
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}
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else if (Site.Parent is ShaderIrOp Op)
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{
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switch (Site.OperIndex)
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{
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case 0: Op.OperandA = Asg.Src; break;
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case 1: Op.OperandB = Asg.Src; break;
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case 2: Op.OperandC = Asg.Src; break;
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default: throw new InvalidOperationException();
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}
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}
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else if (Site.Parent is ShaderIrAsg SiteAsg)
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{
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SiteAsg.Src = Asg.Src;
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}
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else
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{
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throw new InvalidOperationException();
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}
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}
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}
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return true;
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}
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public void SetNewAsg(ShaderIrAsg Asg, int AsgIndex, ShaderIrCond Cond)
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{
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this.Asg = Asg;
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this.AsgIndex = AsgIndex;
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this.Cond = Cond;
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LastSiteIndex = 0;
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Sites.Clear();
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}
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}
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public static void Optimize(List<ShaderIrNode> Nodes, GalShaderType ShaderType)
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{
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Dictionary<int, RegUse> Uses = new Dictionary<int, RegUse>();
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RegUse GetUse(int Key)
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{
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RegUse Use;
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if (!Uses.TryGetValue(Key, out Use))
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{
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Use = new RegUse();
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Uses.Add(Key, Use);
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}
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return Use;
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}
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int GetGprKey(int GprIndex)
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{
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return GprIndex;
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}
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int GetPredKey(int PredIndex)
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{
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return PredIndex | 0x10000000;
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}
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RegUse GetGprUse(int GprIndex)
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{
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return GetUse(GetGprKey(GprIndex));
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}
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RegUse GetPredUse(int PredIndex)
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{
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return GetUse(GetPredKey(PredIndex));
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}
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void RemoveUse(RegUse Use)
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{
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if (!Nodes.Remove((ShaderIrNode)Use.Cond ?? Use.Asg))
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{
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throw new InvalidOperationException();
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}
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}
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void FindRegUses(
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List<(int, UseSite)> UseList,
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ShaderIrNode Parent,
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ShaderIrNode Node,
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ShaderIrCond CondNode,
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int UseIndex,
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int OperIndex = 0)
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{
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if (Node is ShaderIrAsg Asg)
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{
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FindRegUses(UseList, Asg, Asg.Src, CondNode, UseIndex);
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}
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else if (Node is ShaderIrCond Cond)
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{
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FindRegUses(UseList, Cond, Cond.Pred, CondNode, UseIndex, 0);
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FindRegUses(UseList, Cond, Cond.Child, CondNode, UseIndex, 1);
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}
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else if (Node is ShaderIrOp Op)
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{
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FindRegUses(UseList, Op, Op.OperandA, CondNode, UseIndex, 0);
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FindRegUses(UseList, Op, Op.OperandB, CondNode, UseIndex, 1);
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FindRegUses(UseList, Op, Op.OperandC, CondNode, UseIndex, 2);
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}
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else if (Node is ShaderIrOperGpr Gpr && !Gpr.IsConst)
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{
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UseList.Add((GetGprKey(Gpr.Index), new UseSite(Parent, CondNode, UseIndex, OperIndex)));
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}
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else if (Node is ShaderIrOperPred Pred)
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{
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UseList.Add((GetPredKey(Pred.Index), new UseSite(Parent, CondNode, UseIndex, OperIndex)));
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}
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}
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void TryAddRegUseSite(ShaderIrNode Node, ShaderIrCond CondNode, int UseIndex)
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{
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List<(int, UseSite)> UseList = new List<(int, UseSite)>();
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FindRegUses(UseList, null, Node, CondNode, UseIndex);
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foreach ((int Key, UseSite Site) in UseList)
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{
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GetUse(Key).AddUseSite(Site);
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}
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}
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bool TryPropagate(RegUse Use)
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{
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//We can only propagate if the registers that the expression depends
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//on weren't assigned after the original expression assignment
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//to a register took place. We traverse the expression tree to find
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//all registers being used, if any of those registers was assigned
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//after the assignment to be propagated, then we can't propagate.
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if (Use?.Asg == null)
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{
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return false;
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}
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List<(int, UseSite)> UseList = new List<(int, UseSite)>();
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if (Use.Cond != null)
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{
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FindRegUses(UseList, null, Use.Cond, null, 0);
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}
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else
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{
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FindRegUses(UseList, Use.Asg, Use.Asg.Src, null, 0);
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}
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foreach ((int Key, UseSite Site) in UseList)
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{
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//TODO: Build an assignment list inside RegUse,
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//and check if there is an assignment inside the
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//range of Use.AsgIndex and Use.LastSiteIndex,
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//and if that's the case, then we should return false.
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//The current method is too conservative.
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if (GetUse(Key).AsgIndex >= Use.AsgIndex)
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{
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return false;
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}
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}
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return Use.TryPropagate();
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}
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for (int Index = 0, IterCount = 0; Index < Nodes.Count; Index++, IterCount++)
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{
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ShaderIrNode Node = Nodes[Index];
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ShaderIrCond CondNode = null;
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if (Node is ShaderIrCond)
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{
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CondNode = (ShaderIrCond)Node;
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}
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TryAddRegUseSite(Node, CondNode, IterCount);;
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while (Node is ShaderIrCond Cond)
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{
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Node = Cond.Child;
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}
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if (!(Node is ShaderIrAsg Asg))
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{
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continue;
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}
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RegUse Use = null;
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if (Asg.Dst is ShaderIrOperGpr Gpr && !Gpr.IsConst)
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{
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Use = GetGprUse(Gpr.Index);
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}
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else if (Asg.Dst is ShaderIrOperPred Pred)
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{
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Use = GetPredUse(Pred.Index);
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}
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bool CanRemoveAsg = CondNode == null;
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CanRemoveAsg |= IsSameCondition(CondNode, Use?.Cond);
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if (CanRemoveAsg && TryPropagate(Use))
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{
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RemoveUse(Use);
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//Note: Only decrement if the removal was successful.
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//RemoveUse throws when this is not the case so we should be good.
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Index--;
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}
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//All nodes inside conditional nodes can't be propagated,
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//as we don't even know if they will be executed to begin with.
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Use?.SetNewAsg(Asg, IterCount, CondNode);
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}
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foreach (RegUse Use in Uses.Values)
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{
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//Gprs 0-3 are the color output on fragment shaders,
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//so we can't remove the last assignments to those registers.
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if (ShaderType == GalShaderType.Fragment)
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{
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if (Use.Asg?.Dst is ShaderIrOperGpr Gpr && Gpr.Index < 4)
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{
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continue;
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}
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}
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if (TryPropagate(Use))
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{
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RemoveUse(Use);
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}
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}
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}
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private static bool IsSameCondition(ShaderIrCond CondA, ShaderIrCond CondB)
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{
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if (CondA == null || CondB == null)
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{
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return CondA == CondB;
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}
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if (CondA.Not != CondB.Not)
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{
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return false;
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}
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if (CondA.Pred is ShaderIrOperPred PredA)
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{
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if (!(CondB.Pred is ShaderIrOperPred PredB))
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{
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return false;
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}
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if (PredA.Index != PredB.Index)
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{
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return false;
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}
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}
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else if (CondA.Pred != CondB.Pred)
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{
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return false;
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}
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return true;
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}
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}
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} |