1
0
Fork 0
mirror of https://github.com/Ryujinx/Ryujinx.git synced 2024-10-01 12:30:00 +02:00
Ryujinx/ChocolArm64/Instructions
LDj3SNuD ffbfbb5549 Add FCVT <Hd>, <Sn> and FCVT <Sd>, <Hn> Inst.; add Tests. (#692)
* Update OpCodeTable.cs

* Update InstEmitSimdCvt.cs

* Update CpuTestSimd.cs

* Address PR feedback.
2019-05-30 19:51:39 -03:00
..
CryptoHelper.cs Add Smlal_Ve, Smlsl_Ve, Smull_Ve, Umlal_Ve, Umlsl_Ve, Umull_Ve Inst.; add Tests. Add Sse Opt. for Trn1/2_V and Uzp1/2_V Inst. Nits. (#566) 2019-01-29 10:54:39 -03:00
Inst.cs Add ARM32 support on the translator (#561) 2019-01-24 23:59:53 -02:00
InstEmit32Helper.cs Refactoring and optimization on CPU translation (#661) 2019-04-26 14:55:12 +10:00
InstEmitAlu.cs Refactoring and optimization on CPU translation (#661) 2019-04-26 14:55:12 +10:00
InstEmitAlu32.cs Refactoring and optimization on CPU translation (#661) 2019-04-26 14:55:12 +10:00
InstEmitAluHelper.cs Implement some ARM32 memory instructions and CMP (#565) 2019-01-29 13:06:11 -03:00
InstEmitBfm.cs Optmize BFM instruction (#607) 2019-02-26 20:16:50 +11:00
InstEmitCcmp.cs Refactoring and optimization on CPU translation (#661) 2019-04-26 14:55:12 +10:00
InstEmitCsel.cs Refactoring and optimization on CPU translation (#661) 2019-04-26 14:55:12 +10:00
InstEmitException.cs Refactoring and optimization on CPU translation (#661) 2019-04-26 14:55:12 +10:00
InstEmitFlow.cs Refactoring and optimization on CPU translation (#661) 2019-04-26 14:55:12 +10:00
InstEmitFlow32.cs Refactoring and optimization on CPU translation (#661) 2019-04-26 14:55:12 +10:00
InstEmitFlowHelper.cs Refactoring and optimization on CPU translation (#661) 2019-04-26 14:55:12 +10:00
InstEmitHash.cs Adjust naming conventions for Ryujinx and ChocolArm64 projects (#484) 2018-10-30 22:43:02 -03:00
InstEmitMemory.cs Optimize address translation and write tracking on the MMU (#571) 2019-02-24 18:24:35 +11:00
InstEmitMemory32.cs Refactoring and optimization on CPU translation (#661) 2019-04-26 14:55:12 +10:00
InstEmitMemoryEx.cs Refactoring and optimization on CPU translation (#661) 2019-04-26 14:55:12 +10:00
InstEmitMemoryHelper.cs Refactoring and optimization on CPU translation (#661) 2019-04-26 14:55:12 +10:00
InstEmitMove.cs Adjust naming conventions for Ryujinx and ChocolArm64 projects (#484) 2018-10-30 22:43:02 -03:00
InstEmitMul.cs Adjust naming conventions for Ryujinx and ChocolArm64 projects (#484) 2018-10-30 22:43:02 -03:00
InstEmitSimdArithmetic.cs Add Smaxv_V, Sminv_V, Umaxv_V, Uminv_V Inst.; add Tests. (#691) 2019-05-29 21:29:24 -03:00
InstEmitSimdCmp.cs Refactoring and optimization on CPU translation (#661) 2019-04-26 14:55:12 +10:00
InstEmitSimdCrypto.cs Adjust naming conventions for Ryujinx and ChocolArm64 projects (#484) 2018-10-30 22:43:02 -03:00
InstEmitSimdCvt.cs Add FCVT <Hd>, <Sn> and FCVT <Sd>, <Hn> Inst.; add Tests. (#692) 2019-05-30 19:51:39 -03:00
InstEmitSimdHash.cs Adjust naming conventions for Ryujinx and ChocolArm64 projects (#484) 2018-10-30 22:43:02 -03:00
InstEmitSimdHelper.cs Add Smaxv_V, Sminv_V, Umaxv_V, Uminv_V Inst.; add Tests. (#691) 2019-05-29 21:29:24 -03:00
InstEmitSimdLogical.cs Add Cmeq_V, Cmge_V, Cmgt_V, Cmle_V & Cmlt_V (Z & ~Z) Sse opt.. (#646) 2019-03-25 10:23:27 +11:00
InstEmitSimdMemory.cs Optimize address translation and write tracking on the MMU (#571) 2019-02-24 18:24:35 +11:00
InstEmitSimdMove.cs Refactoring and optimization on CPU translation (#661) 2019-04-26 14:55:12 +10:00
InstEmitSimdShift.cs Add Rshrn_V & Shrn_V Sse opt.. Add Mla_V, Mls_V & Mul_V Sse opt.; add Tests. (#614) 2019-03-13 19:23:52 +11:00
InstEmitSystem.cs Optimize address translation and write tracking on the MMU (#571) 2019-02-24 18:24:35 +11:00
InstEmitter.cs Adjust naming conventions for Ryujinx and ChocolArm64 projects (#484) 2018-10-30 22:43:02 -03:00
SoftFallback.cs Add Smlal_Ve, Smlsl_Ve, Smull_Ve, Umlal_Ve, Umlsl_Ve, Umull_Ve Inst.; add Tests. Add Sse Opt. for Trn1/2_V and Uzp1/2_V Inst. Nits. (#566) 2019-01-29 10:54:39 -03:00
SoftFloat.cs Add Smlal_Ve, Smlsl_Ve, Smull_Ve, Umlal_Ve, Umlsl_Ve, Umull_Ve Inst.; add Tests. Add Sse Opt. for Trn1/2_V and Uzp1/2_V Inst. Nits. (#566) 2019-01-29 10:54:39 -03:00
VectorHelper.cs Sse optimized the Scalar & Vector fp-to-fp conversion instructions (MNPZ & IX); added the related Tests (AMNPZ & IX). Small refactoring of existing instructions. (#676) 2019-04-26 08:58:29 +10:00