mirror of
https://github.com/Ryujinx/Ryujinx.git
synced 2024-10-01 12:30:00 +02:00
b9aa3966c0
interpreter, and a rewrite of the GPU code.
315 lines
No EOL
10 KiB
C#
315 lines
No EOL
10 KiB
C#
using System;
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using static Ryujinx.Graphics.Gal.Shader.ShaderDecodeHelper;
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namespace Ryujinx.Graphics.Gal.Shader
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{
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static partial class ShaderDecode
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{
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public static void Fadd_C(ShaderIrBlock Block, long OpCode)
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{
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EmitAluBinaryF(Block, OpCode, ShaderOper.CR, ShaderIrInst.Fadd);
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}
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public static void Fadd_I(ShaderIrBlock Block, long OpCode)
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{
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EmitAluBinaryF(Block, OpCode, ShaderOper.Immf, ShaderIrInst.Fadd);
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}
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public static void Fadd_R(ShaderIrBlock Block, long OpCode)
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{
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EmitAluBinaryF(Block, OpCode, ShaderOper.RR, ShaderIrInst.Fadd);
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}
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public static void Ffma_CR(ShaderIrBlock Block, long OpCode)
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{
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EmitAluFfma(Block, OpCode, ShaderOper.CR);
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}
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public static void Ffma_I(ShaderIrBlock Block, long OpCode)
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{
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EmitAluFfma(Block, OpCode, ShaderOper.Immf);
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}
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public static void Ffma_RC(ShaderIrBlock Block, long OpCode)
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{
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EmitAluFfma(Block, OpCode, ShaderOper.RC);
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}
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public static void Ffma_RR(ShaderIrBlock Block, long OpCode)
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{
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EmitAluFfma(Block, OpCode, ShaderOper.RR);
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}
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public static void Fmul_C(ShaderIrBlock Block, long OpCode)
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{
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EmitAluBinaryF(Block, OpCode, ShaderOper.CR, ShaderIrInst.Fmul);
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}
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public static void Fmul_I(ShaderIrBlock Block, long OpCode)
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{
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EmitAluBinaryF(Block, OpCode, ShaderOper.Immf, ShaderIrInst.Fmul);
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}
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public static void Fmul_R(ShaderIrBlock Block, long OpCode)
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{
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EmitAluBinaryF(Block, OpCode, ShaderOper.RR, ShaderIrInst.Fmul);
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}
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public static void Fsetp_C(ShaderIrBlock Block, long OpCode)
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{
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EmitFsetp(Block, OpCode, ShaderOper.CR);
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}
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public static void Fsetp_I(ShaderIrBlock Block, long OpCode)
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{
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EmitFsetp(Block, OpCode, ShaderOper.Immf);
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}
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public static void Fsetp_R(ShaderIrBlock Block, long OpCode)
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{
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EmitFsetp(Block, OpCode, ShaderOper.RR);
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}
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public static void Ipa(ShaderIrBlock Block, long OpCode)
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{
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ShaderIrNode OperA = GetOperAbuf28(OpCode);
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ShaderIrNode OperB = GetOperGpr20 (OpCode);
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ShaderIrOp Op = new ShaderIrOp(ShaderIrInst.Ipa, OperA, OperB);
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Block.AddNode(GetPredNode(new ShaderIrAsg(GetOperGpr0(OpCode), Op), OpCode));
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}
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public static void Lop32i(ShaderIrBlock Block, long OpCode)
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{
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int SubOp = (int)(OpCode >> 53) & 3;
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bool Ia = ((OpCode >> 55) & 1) != 0;
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bool Ib = ((OpCode >> 56) & 1) != 0;
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ShaderIrInst Inst = 0;
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switch (SubOp)
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{
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case 0: Inst = ShaderIrInst.And; break;
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case 1: Inst = ShaderIrInst.Or; break;
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case 2: Inst = ShaderIrInst.Xor; break;
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}
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ShaderIrNode OperA = GetAluNot(GetOperGpr8(OpCode), Ia);
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//SubOp == 3 is pass, used by the not instruction
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//which just moves the inverted register value.
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if (SubOp < 3)
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{
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ShaderIrNode OperB = GetAluNot(GetOperImm32_20(OpCode), Ib);
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ShaderIrOp Op = new ShaderIrOp(Inst, OperA, OperB);
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Block.AddNode(GetPredNode(new ShaderIrAsg(GetOperGpr0(OpCode), Op), OpCode));
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}
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else
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{
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Block.AddNode(GetPredNode(new ShaderIrAsg(GetOperGpr0(OpCode), OperA), OpCode));
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}
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}
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public static void Mufu(ShaderIrBlock Block, long OpCode)
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{
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int SubOp = (int)(OpCode >> 20) & 7;
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bool Aa = ((OpCode >> 46) & 1) != 0;
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bool Na = ((OpCode >> 48) & 1) != 0;
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ShaderIrInst Inst = 0;
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switch (SubOp)
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{
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case 0: Inst = ShaderIrInst.Fcos; break;
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case 1: Inst = ShaderIrInst.Fsin; break;
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case 2: Inst = ShaderIrInst.Fex2; break;
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case 3: Inst = ShaderIrInst.Flg2; break;
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case 4: Inst = ShaderIrInst.Frcp; break;
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case 5: Inst = ShaderIrInst.Frsq; break;
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default: throw new NotImplementedException(SubOp.ToString());
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}
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ShaderIrNode OperA = GetOperGpr8(OpCode);
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ShaderIrOp Op = new ShaderIrOp(Inst, GetAluAbsNeg(OperA, Aa, Na));
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Block.AddNode(GetPredNode(new ShaderIrAsg(GetOperGpr0(OpCode), Op), OpCode));
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}
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public static void Shr_C(ShaderIrBlock Block, long OpCode)
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{
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EmitAluBinary(Block, OpCode, ShaderOper.CR, GetShrInst(OpCode));
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}
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public static void Shr_I(ShaderIrBlock Block, long OpCode)
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{
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EmitAluBinary(Block, OpCode, ShaderOper.Imm, GetShrInst(OpCode));
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}
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public static void Shr_R(ShaderIrBlock Block, long OpCode)
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{
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EmitAluBinary(Block, OpCode, ShaderOper.RR, GetShrInst(OpCode));
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}
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private static ShaderIrInst GetShrInst(long OpCode)
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{
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bool Signed = ((OpCode >> 48) & 1) != 0;
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return Signed ? ShaderIrInst.Asr : ShaderIrInst.Lsr;
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}
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private static void EmitAluBinary(
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ShaderIrBlock Block,
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long OpCode,
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ShaderOper Oper,
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ShaderIrInst Inst)
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{
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ShaderIrNode OperA = GetOperGpr8(OpCode), OperB;
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switch (Oper)
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{
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case ShaderOper.CR: OperB = GetOperCbuf34 (OpCode); break;
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case ShaderOper.Imm: OperB = GetOperImm19_20(OpCode); break;
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case ShaderOper.RR: OperB = GetOperGpr20 (OpCode); break;
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default: throw new ArgumentException(nameof(Oper));
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}
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ShaderIrNode Op = new ShaderIrOp(Inst, OperA, OperB);
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Block.AddNode(GetPredNode(new ShaderIrAsg(GetOperGpr0(OpCode), Op), OpCode));
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}
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private static void EmitAluBinaryF(
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ShaderIrBlock Block,
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long OpCode,
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ShaderOper Oper,
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ShaderIrInst Inst)
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{
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bool Nb = ((OpCode >> 45) & 1) != 0;
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bool Aa = ((OpCode >> 46) & 1) != 0;
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bool Na = ((OpCode >> 48) & 1) != 0;
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bool Ab = ((OpCode >> 49) & 1) != 0;
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bool Ad = ((OpCode >> 50) & 1) != 0;
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ShaderIrNode OperA = GetOperGpr8(OpCode), OperB;
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if (Inst == ShaderIrInst.Fadd)
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{
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OperA = GetAluAbsNeg(OperA, Aa, Na);
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}
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switch (Oper)
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{
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case ShaderOper.CR: OperB = GetOperCbuf34 (OpCode); break;
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case ShaderOper.Immf: OperB = GetOperImmf19_20(OpCode); break;
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case ShaderOper.RR: OperB = GetOperGpr20 (OpCode); break;
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default: throw new ArgumentException(nameof(Oper));
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}
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OperB = GetAluAbsNeg(OperB, Ab, Nb);
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ShaderIrNode Op = new ShaderIrOp(Inst, OperA, OperB);
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Op = GetAluAbs(Op, Ad);
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Block.AddNode(GetPredNode(new ShaderIrAsg(GetOperGpr0(OpCode), Op), OpCode));
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}
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private static void EmitAluFfma(ShaderIrBlock Block, long OpCode, ShaderOper Oper)
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{
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bool Nb = ((OpCode >> 48) & 1) != 0;
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bool Nc = ((OpCode >> 49) & 1) != 0;
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ShaderIrNode OperA = GetOperGpr8(OpCode), OperB, OperC;
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switch (Oper)
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{
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case ShaderOper.CR: OperB = GetOperCbuf34 (OpCode); break;
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case ShaderOper.Immf: OperB = GetOperImmf19_20(OpCode); break;
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case ShaderOper.RC: OperB = GetOperGpr39 (OpCode); break;
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case ShaderOper.RR: OperB = GetOperGpr20 (OpCode); break;
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default: throw new ArgumentException(nameof(Oper));
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}
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OperB = GetAluNeg(OperB, Nb);
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if (Oper == ShaderOper.RC)
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{
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OperC = GetAluNeg(GetOperCbuf34(OpCode), Nc);
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}
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else
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{
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OperC = GetAluNeg(GetOperGpr39(OpCode), Nc);
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}
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ShaderIrOp Op = new ShaderIrOp(ShaderIrInst.Ffma, OperA, OperB, OperC);
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Block.AddNode(GetPredNode(new ShaderIrAsg(GetOperGpr0(OpCode), Op), OpCode));
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}
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private static void EmitFsetp(ShaderIrBlock Block, long OpCode, ShaderOper Oper)
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{
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bool Aa = ((OpCode >> 7) & 1) != 0;
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bool Np = ((OpCode >> 42) & 1) != 0;
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bool Na = ((OpCode >> 43) & 1) != 0;
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bool Ab = ((OpCode >> 44) & 1) != 0;
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ShaderIrNode OperA = GetOperGpr8(OpCode), OperB;
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switch (Oper)
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{
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case ShaderOper.CR: OperB = GetOperCbuf34 (OpCode); break;
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case ShaderOper.Immf: OperB = GetOperImmf19_20(OpCode); break;
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case ShaderOper.RR: OperB = GetOperGpr20 (OpCode); break;
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default: throw new ArgumentException(nameof(Oper));
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}
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ShaderIrInst CmpInst = GetCmp(OpCode);
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ShaderIrOp Op = new ShaderIrOp(CmpInst,
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GetAluAbsNeg(OperA, Aa, Na),
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GetAluAbs (OperB, Ab));
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ShaderIrOperPred P0Node = GetOperPred3 (OpCode);
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ShaderIrOperPred P1Node = GetOperPred0 (OpCode);
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ShaderIrOperPred P2Node = GetOperPred39(OpCode);
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Block.AddNode(GetPredNode(new ShaderIrAsg(P0Node, Op), OpCode));
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ShaderIrInst LopInst = GetBLop(OpCode);
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if (LopInst == ShaderIrInst.Band && P1Node.IsConst && P2Node.IsConst)
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{
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return;
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}
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ShaderIrNode P2NNode = P2Node;
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if (Np)
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{
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P2NNode = new ShaderIrOp(ShaderIrInst.Bnot, P2NNode);
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}
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Op = new ShaderIrOp(ShaderIrInst.Bnot, P0Node);
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Op = new ShaderIrOp(LopInst, Op, P2NNode);
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Block.AddNode(GetPredNode(new ShaderIrAsg(P1Node, Op), OpCode));
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Op = new ShaderIrOp(LopInst, P0Node, P2NNode);
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Block.AddNode(GetPredNode(new ShaderIrAsg(P0Node, Op), OpCode));
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}
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}
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} |