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633 commits 2 branches 1 tag 36 MiB
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167 commits

Author SHA1 Message Date
LDj3SNuD
302c1d2861 Fix Addp_S in AOpCodeTable. Add 5 Tests: ADDP (scalar), ADDP (vector), ADDV. (#96) 
* Update AOpCodeTable.cs

* Update Pseudocode.cs

* Update Instructions.cs

* Update CpuTestSimd.cs

* Update CpuTestSimdReg.cs

* Update Instructions.cs

* Revert "Started to work in improving the sync primitives"
 2018-04-21 16:15:04 -03:00
LDj3SNuD
2ccd995cb2 Add ADDHN{2}, RADDHN{2}, SUBHN{2}, RSUBHN{2} (vector) instructions. Add 8 Tests. (#92) 
* Update AOpCodeTable.cs

* Update AInstEmitSimdArithmetic.cs

* Update Pseudocode.cs

* Update Instructions.cs

* Update Bits.cs

* Create CpuTestSimd.cs

* Create CpuTestSimdReg.cs

* Update CpuTestSimd.cs

Provide a better supply of input values for the 20 Simd Tests.

* Update CpuTestSimdReg.cs

Provide a better supply of input values for the 20 Simd Tests.

* Update AOpCodeTable.cs

* Update AInstEmitSimdArithmetic.cs

* Update CpuTestSimd.cs

* Update CpuTestSimdReg.cs
 2018-04-20 12:40:15 -03:00
gdkchan
03002f6537 Add SvcSetThreadActivity, tweak SignalProcessWideKey, add fmul32i shader instructions and other small fixes 2018-04-19 16:18:30 -03:00
MS-DOS1999
76a5972378 Fix Fmin/max and add vector version, add and modifying fmin/max tests (#89) 2018-04-19 00:22:12 -03:00
LDj3SNuD
8b75080639 Add ABS (scalar & vector), ADD (scalar), NEG (scalar) instructions. (#88) 
* Update AOpCodeTable.cs

* Update AInstEmitSimdArithmetic.cs

* Update AOpCodeTable.cs
 2018-04-18 10:56:27 -03:00
LDj3SNuD
262b5b8054 Add TRN1 & TRN2 (vector) instructions. Add 4 simple tests (4S, 8B). (#77) 
* Update AOpCodeTable.cs

* Update AInstEmitSimdMove.cs

* Update CpuTestSimdMove.cs

* Update AInstEmitSimdMove.cs

* Update CpuTestSimdMove.cs
 2018-04-12 11:52:00 -03:00
gdkchan
9227b0ea59 [CPU] Speed up translation a little bit 2018-04-11 14:44:03 -03:00
gdkchan
cb29b4303c [CPU] Fix CNT instruction 2018-04-10 20:58:32 -03:00
LDj3SNuD
7acd0e0122 Add FMUL (scalar, by element) instruction; add FRECPE, FRECPS (scalar & vector) instructions. Add 5 simple tests. (#74) 
* Update AOpCodeTable.cs

* Update AInstEmitSimdArithmetic.cs

* Update AInstEmitSimdHelper.cs

* Update CpuTestSimdArithmetic.cs

* Update AOpCodeTable.cs

* Update AInstEmitSimdArithmetic.cs
 2018-04-08 16:08:57 -03:00
gdkchan
980691f36b [CPU] Fix CBZ/CBNZ with 32 bits operands 2018-04-06 17:22:26 -03:00
gdkchan
702daf2ff4 [CPU] Fail early when the index/size of the vector is invalid 2018-04-06 15:39:39 -03:00
gdkchan
df3cbadceb Fix FRSQRTS and FCM* (scalar) instructions 2018-04-06 10:20:17 -03:00
gdkchan
36d9130592 Add FMLS (vector) instruction 2018-04-06 01:41:54 -03:00
gdkchan
f15b1c76a1 Add FRSQRTS and FCM* instructions 2018-04-05 23:28:12 -03:00
Merry
39f20d8d1a Implement Frsqrte_S (#72) 
* Implement Frsqrte_S

* Implement Frsqrte_V

* Add Frsqrte_S test
 2018-04-05 20:36:19 -03:00
gdkchan
45c078d782 Add Faddp (vector) instruction 2018-04-04 22:13:10 -03:00
gdkchan
e16ca561cb HashSet is not thread safe, hopefully this fixes the CPU issue where it throws a exception on Add 2018-04-04 18:17:37 -03:00
gdkchan
a20d6b34ab Add PRFM (unscaled) instruction 2018-04-04 18:10:20 -03:00
gdkchan
7fe12ad169 Add FNEG (vector) instruction 2018-04-04 16:36:07 -03:00
gdkchan
0ac4681fa0 Fix 32-bits extended register instructions with 64-bits extensions 2018-03-30 23:32:06 -03:00
gdkchan
53e2d34905 Enable all ld/st (single structure) instructions 2018-03-30 18:06:02 -03:00
gdkchan
916540ff41 Fix EXT/Widening instruction carrying garbage values on some cases, fix ABD (it shouldn't accumulate, this is another variation of the instruction) 2018-03-30 17:37:31 -03:00
gdkchan
76ac31add6 Add BIT instruction 2018-03-30 16:46:00 -03:00
gdkchan
19b8344568 Add UABD instruction 2018-03-30 16:30:23 -03:00
gdkchan
ba43af5765 Add UABDL instruction 2018-03-30 16:16:16 -03:00
gdkchan
f42f39fd90 Add UADDL instruction 2018-03-30 15:55:28 -03:00
gdkchan
9b6fa1f89e Add UHADD instruction 2018-03-30 12:37:07 -03:00
gdkchan
b2549d83bf Add FNMADD instruction 2018-03-24 00:28:23 -03:00
LDj3SNuD
873a7cd112 Add Cls Instruction. (#67) 
* Update AInstEmitAlu.cs

* Update ASoftFallback.cs

* Update AOpCodeTable.cs
 2018-03-23 22:06:05 -03:00
MS-DOS1999
ca6cf1cc90 Add Frint Instructions and Tests (#62) 
* add 'ADC 32bit and Overflow' test

* Add WZR/WSP tests

* fix ADC and ADDS

* add ADCS test

* add SBCS test

* indent my code and delete comment

* '/' <- i hate you x)

* remove spacebar char

* remove false tab

* add frintx_S test

* update frintx_S test

* add ASRV test

* fix new line

* fix PR

* fix indent

* Add add_V tests

* work on Frintx_V

* Add Frintx_V Instruction

* add some instruction and test

* Syntax + indent

* Delete Console Write

* Delete Console Write 2

* CR del

* Skip NaNs tests

* Skip NaNs tests 2

* Fix errors 1

* Fix errors 2
 2018-03-23 07:40:23 -03:00
gdkchan
e922c3627a Rename IpcServices -> Services 2018-03-20 17:00:00 -03:00
gdkchan
4940cf0ea5 Add BFI instruction, even more audout fixes 2018-03-16 00:42:44 -03:00
gdkchan
88c6160c62 Add MLA (vector by element), fixes some cases of MUL (vector by element)? 2018-03-15 22:36:47 -03:00
gdkchan
79a5939734
Improvements to audout (#58) 
* Some audout refactoring and improvements

* More audio improvements

* Change ReadAsciiString to use long for the Size, avoids some casting
 2018-03-15 21:06:24 -03:00
gdkchan
92f47d535e Fix crc32 instruction with size greater than a byte 2018-03-15 18:14:22 -03:00
gdkchan
ee8fb18a0f Fix CPU instruction Ld/St (single structure) with index != 0 2018-03-15 12:59:23 -03:00
gdkchan
b50bc46888 CPU fix for the cases using a Mask with shift = 0 2018-03-14 01:59:22 -03:00
gdkchan
d067b4d5e0 Remove unused function from CPU 2018-03-14 00:57:07 -03:00
gdkchan
553ba659c4 Add CRC32 instruction and SLI (vector) 2018-03-14 00:12:05 -03:00
gdkchan
2ed24af756 Add pl:u stub, use higher precision on CNTPCT_EL0 register tick count 2018-03-13 21:24:32 -03:00
gdkchan
6f4282daf8 IAudioDeviceService -> IAudioDevice 2018-03-12 16:31:09 -03:00
gdkchan
d88b5c7621 Fix GetAudioRenderersProcessMasterVolume which was totally wrong 2018-03-12 16:29:06 -03:00
gdkchan
7a27990faa Allow more than one process, free resources on process dispose, implement SvcExitThread 2018-03-12 01:14:12 -03:00
gdkchan
28275a8976 Do not sign-extend timestamps 2018-03-10 20:51:55 -03:00
gdkchan
3777fb44cf Allow to enable/disable memory checks even on release mode through the flag, return error for invalid addresses on SvcMap*Memory svcs, do not return error on SvcQueryMemory (instead, return reserved for the end of the address space), other minor tweaks 2018-03-10 20:39:16 -03:00
gdkchan
553f6c2976 Fix EmitScalarUnaryOpF and add SSRA (vector) 2018-03-10 00:00:31 -03:00
gdkchan
30bcb8da33 Add FRINTM (vector) instruction 2018-03-09 23:41:05 -03:00
gdkchan
aa2d2b3149 Add SHLL instruction 2018-03-09 23:28:38 -03:00
gdkchan
5912bd2beb Disable memory checks by default, even on debug, move ram memory allocation inside the CPU, since the size if fixed anyway, better heap region size 2018-03-09 23:12:57 -03:00
gdkchan
be0e4007dc Add SMLAL (vector), fix EXT instruction 2018-03-06 21:36:49 -03:00
gdkchan
2d9edddf8c Remove QueryMemory workaround 2018-03-05 16:20:30 -03:00
gdkchan
59d1b2ad83 Add MUL (vector by element), fix FCVTN, make svcs use MakeError too 2018-03-05 16:18:37 -03:00
gdkchan
0e343a748d Add FCVTL and FCVTN instruction (no Half support yet), stub SvcClearEvent 2018-03-05 12:58:56 -03:00
gdkchan
344fc8a55d Try fixing NvFlinger rotation with scaling, return correct error code on WaitSignal timeout, always display window at the center of the screen 2018-03-04 20:32:18 -03:00
gdkchan
3edb66f389
Improve CPU initial translation speeds (#50) 
* Add background translation to the CPU

* Do not use a separate thread for translation, implement 2 tiers translation

* Remove unnecessary usings

* Lower MinCallCountForReJit

* Remove unused variable
 2018-03-04 14:09:59 -03:00
gdkchan
efef605b26 Fix REV64 (vector) instruction 2018-03-02 20:24:16 -03:00
gdkchan
829b1b1cc0 Add REV64 (vector) instruction 2018-03-02 20:03:28 -03:00
gdkchan
f39a864050 Add EXT, CMTST (vector) and UMULL (vector) instructions 2018-03-02 19:23:38 -03:00
gdkchan
f876bd2a80 Change SvcGetInfo 5 to return actual heap size, remove AMemoryAlloc since it is no longer needed with direct memory access, move some memory management logic out of AMemoryMgr, change default virtual filesystem path to AppData 2018-02-27 20:45:07 -03:00
gdkchan
708761963e Fix corner cases of ADCS and SBFM 2018-02-26 15:56:34 -03:00
gdkchan
f6dc86c6a0 Implement SvcSetMemoryAttribute 2018-02-25 22:53:01 -03:00
gdkchan
950011c90f Added initial support for function names from symbol table on the cpu with tracing, fix wrong ImageEnd on executables with MOD0, fix issue on the CPU on input elimination for instruction with more than one register store 2018-02-25 22:14:58 -03:00
gdkchan
31b35a9645 Add FABD (scalar), ADCS, SBCS instructions, update config with better default control mappings, update readme with the new mappings 2018-02-24 18:47:08 -03:00
gdkchan
035efc913e Fix cpu issue with cmp optimization, add HINT and FRINTX (scalar) instructions, fix for NvFlinger sometimes missing free buffers 2018-02-24 11:19:28 -03:00
gdkchan
3936c93448 Map heap on heap base region, fix for thread start on homebrew, add FCVTMU and FCVTPU (general) instructions, fix FMOV (higher 64 bits) encodings, improve emit code for FCVT* (general) instructions 2018-02-23 21:59:38 -03:00
gdkchan
2cba1d49f6 Add FRINTP instruction, fix opcode ctor call method creation with multithreading 2018-02-22 16:26:11 -03:00
emmauss
62b827f474 Split main project into core,graphics and chocolarm4 subproject (#29) 2018-02-20 17:09:23 -03:00